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Download Continuous-Time Digital Front-Ends for Multistandard by Pieter A. J. Nuyts, Patrick Reynaert, Wim Dehaene PDF

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By Pieter A. J. Nuyts, Patrick Reynaert, Wim Dehaene

This ebook describes the layout of absolutely electronic multistandard transmitter front-ends that may at once force a number of switching strength amplifiers, therefore putting off all different analog parts. After reviewing varied architectures, the authors specialise in polar architectures utilizing pulse width modulation (PWM), that are completely in line with unclocked hold up traces and different continuous-time electronic undefined. accordingly, readers are enabled to shift accuracy issues from the voltage area to the time area, to coincide with submicron CMOS know-how scaling. The authors current assorted architectural suggestions and evaluate them, in keeping with their impact at the sign and spectrum caliber. subsequent, a high-level theoretical research of 2 various PWM-based architectures – baseband PWM and RF PWM – is made. at the circuit point, conventional electronic parts and layout options are revisited from the perspective of continuous-time electronic circuits. vital layout standards are pointed out and assorted suggestions are offered, in addition to their merits and downsides. eventually, chips designed in nanometer CMOS applied sciences are defined, besides size effects for validation.

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Extra resources for Continuous-Time Digital Front-Ends for Multistandard Wireless Transmission

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As shown by Blocher and Singerl [2], the coding efficiency of a polar modulator is higher than for a quadrature modulator. Combined with the increased PA efficiency, this results in an overall efficiency improvement. For these reasons, the following chapters will focus on polar modulators. However, polar modulators also have some disadvantages compared to quadrature modulators. 9). Typically, the bandwidths are about 3–6 times the I/Q bandwidth B [56]. This limitation can often be overcome without major problems in modern CMOS technologies thanks to the increasing transistor speed.

This is often done using a voltage-controlled (VCO) or digitally controlled oscillator (DCO), mostly with feedback to implement a phase-locked loop (PLL) [39–41, 61, 63–65]. In this case, the carrier is phase-modulated while it is created. However, it is also possible to phase-modulate an existing carrier, as is demonstrated in [42–44, 52, 53], and in Chaps. 5 and 6 of this work. In implementations where the carrier is directly phase-modulated, the RF signal is a square-wave PMC multiplied with the single-bit amplitude signal as shown in Fig.

When the voltage reaches zero, the transistor can be turned on while there is no voltage across it. This is known as soft switching or zero-voltage switching. Because of this, there is no switching loss as in class-D amplification. This is an important advantage of class-E PAs. Since the switching losses caused by hard switching are proportional to the frequency, this advantage becomes more significant for high operating frequencies. However, it should be noted that soft switching only occurs when the PA is switched at the frequency determined by L d and Cd [49].

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